Freescale公司的HC08和更新的HCS08微处理器系列具有通用外围模块。时钟发生器也不例外。其范围从任意I/O引脚的内部时钟到外部晶体或晶振。一旦选择了时钟源,可以有多种控制最终总线频率的选择。例如,为MC9S08GB微处理器连接一个32,768Hz的晶体,允许使用FLL(锁频环)产生最多18.874 MHz的总线频率。选择源、除数和FLL允许多功能且复杂的设置。
一旦写入总线时钟初始化程序,在继续工程其它部分之前,也许想检验总线是否以期望的速度运行。本设计方案给出在任意I/O端口以总线1/9的精确速度输出方波的程序(清单1和清单2)。仅连接一个频率计数器到这个管脚,显示总线频率。只需做的是将小数点向右移动一位。一旦检验总线速度,可以信赖的写定时器、串行I/O和其他时钟有关的程序。
只需要写代码,首先关中断和关COP(共有片上处理器)。在总线时钟初始化程序中,确保将想要使用的I/O端口初始化为输出。然后,只跳到toggle clock,输出总线频率除10,直到断电。本设计方案使用HC08版的PB0( 清单1)和HCS08版的PD0(清单2)。通过改变第一条线确定端口和第二条线选择位,可以使用任何适合的I/O端口。本设计方案也命名了老符号PB的端口,替代如今常用的PTB。
英文原文:
Routines directly measure microcontroller-bus clock
You can verify the bus frequency of the HC08 SCS08 microcontroller with simple control loops.
Kerry Erendson, Bulova Technologies; Edited by Charles H Small and Fran Granville -- EDN, 10/25/2007
The Freescale HC08 and newer HCS08 microcontroller families have versatile peripheral modules. Their clock generators are no exceptions. They range from the internal clock, which frees I/O pins, to external crystals or oscillators. Once you select the timing source, you have many options for controlling the final bus frequency. For instance, connecting a 32,768-Hz crystal to an MC9S08GB microcontroller allows you to use the FLL (frequency-locked loop) to generate many bus frequencies as high as 18.874 MHz. Selecting the source, the divisors, and the FLL settings allows versatility but also can get complicated.
Once you write the bus-clock-initialization routine, you may want to verify that the bus is running at the speed you intend before moving on to the rest of the project. This Design Idea presents routines that output a square wave at exactly one-tenth the bus speed on any I/O port (Listing 1 and Listing 2). Just connect a frequency counter to this pin, and it will display your bus frequency. All you have to do is move the decimal point one place to the right. Once you verify the bus speed, you can confidently write the timer, serial-I/O, and other clock-dependent routines.
You need to write code only to first disable interrupts and disable the COP (common on-chip processor). In your bus-clock-initialization routine, be sure to initialize the I/O port you want to use as an output. Then, just jump to the toggle clock, which outputs the bus frequency divided by 10 until power-down. This Design Idea uses PB0 in the HC08 version (Listing 1) and PD0 in the HCS08 version (Listing 2). You can use any available I/O port by altering the first line to identify the port and the second line to choose a bit. Also, this Design Idea names ports with the older notation PB, instead of today’s more fashionable PTB.
上一篇:基于PIC18F66J60的Ethernet至RS-232的协议转换器
下一篇:基于PC的开放式多轴运动控制系统开发
推荐阅读最新更新时间:2024-05-13 18:39