rs bit p2.6
r_w bit p2.5
enable bit p2.7
db0_db7 data p1
org 0000h
ajmp main
org 0050h
main:mov sp,#60h
lcall initial
lcall cls
main1:
ll2:lcall key
cjne a,#00h,l1
ajmp lp
l1:cjne a,#01h,l2a
ajmp lp
l2a:cjne a,#02h,l2
ajmp lp
l2:cjne a,#03h,l3
ajmp lp
l3:cjne a,#04h,l4
ajmp lp
l4:cjne a,#05h,l5
ajmp lp
l5:cjne a,#06h,l6
ajmp lp
l6:cjne a,#07h,l7
ajmp lp
l7:cjne a,#08h,l8
ajmp lp
l8:cjne a,#09h,l9
ajmp lp
l9:cjne a,#0ah,l10
ajmp lp
l10:cjne a,#0bh,ll2
lp:mov 32h,a
mov dptr,#tab0
movc a,@a+dptr
mov 30h,a
mov a,32h
mov dptr,#tab1
movc a,@a+dptr
mov 31h,a
ajmp loop
loop:mov a,30h
lcall write_instruction
mov a,31h
lcall writelcddata
ljmp main1
;*********************************
initial:
mov a,#00111000b
lcall write_instruction
mov a,#00001110b
lcall write_instruction
mov a,#00000110b
lcall write_instruction
ret
;***********************************
cls:
mov a,#01h
lcall write_instruction
ret
;************************************
write_instruction:
lcall checkbusy
clr enable
clr r_w
clr rs
setb enable
mov db0_db7,a
clr enable
ret
;************************************
checkbusy:
push acc
checkbusyloop:
clr enable
setb r_w
clr rs
setb enable
mov a,db0_db7
clr enable
jb acc.7,checkbusyloop
pop acc
lcall delay1
ret
;*************************************
writelcddata:
lcall checkbusy
clr enable
clr r_w
setb rs
setb enable
mov db0_db7,a
clr enable
ret
;**************************************
delay1:
mov r5,#06
kp01:mov r6,#248
djnz r6,$
djnz r5,kp01
ret
;***************************************
key:lcall ks
jnz k1
lcall delay2
ajmp key
k1:lcall delay2
lcall delay2
jnz k2
ajmp key
k2:mov r2,#0dfh
mov r4,#00h
k6:mov p3,r2
jb p3.0,k3
mov a,#00h
ajmp lk
k3:jb p3.1,k4
mov a,#03h
ajmp lk
k4:jb p3.2,k5
mov a,#06h
ajmp lk
k5:jb p3.3,next
mov a,#09h
lk:add a,r4
push acc
lkk:lcall delay2
lcall ks
jnz lkk
pop acc
ret
next:
inc r4
mov a,r2
jnb acc.7,key
rl a
mov r2,a
ajmp k6
ks: mov p3,#0fh
mov a,p3
xrl a,#0fh
ret
delay2:
mov 35h,#4ah
tt01:mov 36h,#0fah
djnz 36h,$
djnz 35h,tt01
ret
tab1:db 30h,31h,32h,33h,34h,35h,36h,37h,38h,39h,41h,42h
tab0:db 80h,81h,82h,83h,84h,85h,86h,87h,88h,89h,8ah,8bh
end
引用地址:1602液晶屏驱动源程序1
r_w bit p2.5
enable bit p2.7
db0_db7 data p1
org 0000h
ajmp main
org 0050h
main:mov sp,#60h
lcall initial
lcall cls
main1:
ll2:lcall key
cjne a,#00h,l1
ajmp lp
l1:cjne a,#01h,l2a
ajmp lp
l2a:cjne a,#02h,l2
ajmp lp
l2:cjne a,#03h,l3
ajmp lp
l3:cjne a,#04h,l4
ajmp lp
l4:cjne a,#05h,l5
ajmp lp
l5:cjne a,#06h,l6
ajmp lp
l6:cjne a,#07h,l7
ajmp lp
l7:cjne a,#08h,l8
ajmp lp
l8:cjne a,#09h,l9
ajmp lp
l9:cjne a,#0ah,l10
ajmp lp
l10:cjne a,#0bh,ll2
lp:mov 32h,a
mov dptr,#tab0
movc a,@a+dptr
mov 30h,a
mov a,32h
mov dptr,#tab1
movc a,@a+dptr
mov 31h,a
ajmp loop
loop:mov a,30h
lcall write_instruction
mov a,31h
lcall writelcddata
ljmp main1
;*********************************
initial:
mov a,#00111000b
lcall write_instruction
mov a,#00001110b
lcall write_instruction
mov a,#00000110b
lcall write_instruction
ret
;***********************************
cls:
mov a,#01h
lcall write_instruction
ret
;************************************
write_instruction:
lcall checkbusy
clr enable
clr r_w
clr rs
setb enable
mov db0_db7,a
clr enable
ret
;************************************
checkbusy:
push acc
checkbusyloop:
clr enable
setb r_w
clr rs
setb enable
mov a,db0_db7
clr enable
jb acc.7,checkbusyloop
pop acc
lcall delay1
ret
;*************************************
writelcddata:
lcall checkbusy
clr enable
clr r_w
setb rs
setb enable
mov db0_db7,a
clr enable
ret
;**************************************
delay1:
mov r5,#06
kp01:mov r6,#248
djnz r6,$
djnz r5,kp01
ret
;***************************************
key:lcall ks
jnz k1
lcall delay2
ajmp key
k1:lcall delay2
lcall delay2
jnz k2
ajmp key
k2:mov r2,#0dfh
mov r4,#00h
k6:mov p3,r2
jb p3.0,k3
mov a,#00h
ajmp lk
k3:jb p3.1,k4
mov a,#03h
ajmp lk
k4:jb p3.2,k5
mov a,#06h
ajmp lk
k5:jb p3.3,next
mov a,#09h
lk:add a,r4
push acc
lkk:lcall delay2
lcall ks
jnz lkk
pop acc
ret
next:
inc r4
mov a,r2
jnb acc.7,key
rl a
mov r2,a
ajmp k6
ks: mov p3,#0fh
mov a,p3
xrl a,#0fh
ret
delay2:
mov 35h,#4ah
tt01:mov 36h,#0fah
djnz 36h,$
djnz 35h,tt01
ret
tab1:db 30h,31h,32h,33h,34h,35h,36h,37h,38h,39h,41h,42h
tab0:db 80h,81h,82h,83h,84h,85h,86h,87h,88h,89h,8ah,8bh
end
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