MSP430F5529硬件IIC驱动IIC接口的OLED

//******************************************************************************

//   MSP430F552x Demo - USCI_B0, I2C Master multiple byte TX/RX

//

//   Description: I2C master communicates to I2C slave sending and receiving

//   3 different messages of different length. I2C master will enter LPM0 mode

//   while waiting for the messages to be sent/receiving using I2C interrupt.

//   ACLK = NA, MCLK = SMCLK = DCO 16MHz.

//

//                                     /| /|

//                   MSP430F5529       4.7k |

//                 -----------------    |  4.7k

//            /| |             P3.1|---+---|-- I2C Clock (UCB0SCL)

//             |  |                 |       |

//             ---|RST          P3.0|-------+-- I2C Data (UCB0SDA)

//                |                 |

//                |                 |

//                |                 |

//                |                 |

//                |                 |

//                |                 |

//

//   Nima Eskandari

//   Texas Instruments Inc.

//   April 2017

//   Built with CCS V7.0

//******************************************************************************

#include

#include

#include

#include "oledfont.h"

//******************************************************************************

// Example Commands ************************************************************

//******************************************************************************

#define X_WIDTH         128

#define Y_WIDTH         64

#define OLED_CMD  0        //写命令

#define OLED_DATA 1        //写数据

#define SLAVE_ADDR  0x3C

/* CMD_TYPE_X_SLAVE are example commands the master sends to the slave.

* The slave will send example SlaveTypeX buffers in response.

*

* CMD_TYPE_X_MASTER are example commands the master sends to the slave.

* The slave will initialize itself to receive MasterTypeX example buffers.

* */

#define CMD_TYPE_0_SLAVE      0

#define CMD_TYPE_1_SLAVE      1

#define CMD_TYPE_2_SLAVE      2

#define CMD_TYPE_0_MASTER      3

#define CMD_TYPE_1_MASTER      4

#define CMD_TYPE_2_MASTER      5

#define TYPE_0_LENGTH   1

#define TYPE_1_LENGTH   2

#define TYPE_2_LENGTH   6

#define MAX_BUFFER_SIZE     20

/* MasterTypeX are example buffers initialized in the master, they will be

* sent by the master to the slave.

* SlaveTypeX are example buffers initialized in the slave, they will be

* sent by the slave to the master.

* */

uint8_t MasterType2 [TYPE_2_LENGTH] = {'F', '4', '1', '9', '2', 'B'};

uint8_t MasterType1 [28] = {0xae,0x00,0x10,0x40,0x81,0xcf,0xa1,0xc8,0xa6,0xa8,0x3f,0xd3,0x00,0xd5,0x80,0xd9,0xf1,0xda,0x12,0xdb,0x40,0x20,0x02,0x8d,0x14,0xa4,0xa6,0xaf};

uint8_t MasterType0 [1] = {0};

uint8_t SlaveType2 [TYPE_2_LENGTH] = {0};

uint8_t SlaveType1 [TYPE_1_LENGTH] = {0};

uint8_t SlaveType0 [TYPE_0_LENGTH] = {0};

void delay(unsigned int z)

{

  unsigned int x,y;

  for(x=z;x>0;x--)

    for(y=5000;y>0;y--);

}

//******************************************************************************

// General I2C State Machine ***************************************************

//******************************************************************************

typedef enum I2C_ModeEnum{

    IDLE_MODE,

    NACK_MODE,

    TX_REG_ADDRESS_MODE,

    RX_REG_ADDRESS_MODE,

    TX_DATA_MODE,

    RX_DATA_MODE,

    SWITCH_TO_RX_MODE,

    SWITHC_TO_TX_MODE,

    TIMEOUT_MODE

} I2C_Mode;

/* Used to track the state of the software state machine*/

I2C_Mode MasterMode = IDLE_MODE;

/* The Register Address/Command to use*/

uint8_t TransmitRegAddr = 0;

/* ReceiveBuffer: Buffer used to receive data in the ISR

* RXByteCtr: Number of bytes left to receive

* ReceiveIndex: The index of the next byte to be received in ReceiveBuffer

* TransmitBuffer: Buffer used to transmit data in the ISR

* TXByteCtr: Number of bytes left to transfer

* TransmitIndex: The index of the next byte to be transmitted in TransmitBuffer

* */

uint8_t ReceiveBuffer[MAX_BUFFER_SIZE] = {0};

uint8_t RXByteCtr = 0;

uint8_t ReceiveIndex = 0;

uint8_t TransmitBuffer[MAX_BUFFER_SIZE] = {0};

uint8_t TXByteCtr = 0;

uint8_t TransmitIndex = 0;

/* I2C Write and Read Functions */

/* For slave device with dev_addr, writes the data specified in *reg_data

*

* dev_addr: The slave device address.

*           Example: SLAVE_ADDR

* reg_addr: The register or command to send to the slave.

*           Example: CMD_TYPE_0_MASTER

* *reg_data: The buffer to write

*           Example: MasterType0

* count: The length of *reg_data

*           Example: TYPE_0_LENGTH

*  */

I2C_Mode I2C_Master_WriteReg(uint8_t dev_addr, uint8_t reg_addr, uint8_t *reg_data, uint8_t count);

/* For slave device with dev_addr, read the data specified in slaves reg_addr.

* The received data is available in ReceiveBuffer

*

* dev_addr: The slave device address.

*           Example: SLAVE_ADDR

* reg_addr: The register or command to send to the slave.

*           Example: CMD_TYPE_0_SLAVE

* count: The length of data to read

*           Example: TYPE_0_LENGTH

*  */

I2C_Mode I2C_Master_ReadReg(uint8_t dev_addr, uint8_t reg_addr, uint8_t count);

void CopyArray(uint8_t *source, uint8_t *dest, uint8_t count);

I2C_Mode I2C_Master_ReadReg(uint8_t dev_addr, uint8_t reg_addr, uint8_t count)

{

    /* Initialize state machine */

    MasterMode = TX_REG_ADDRESS_MODE;

    TransmitRegAddr = reg_addr;

    RXByteCtr = count;

    TXByteCtr = 0;

    ReceiveIndex = 0;

    TransmitIndex = 0;

    /* Initialize slave address and interrupts */

    UCB0I2CSA = dev_addr;

    UCB0IFG &= ~(UCTXIFG + UCRXIFG);       // Clear any pending interrupts

    UCB0IE &= ~UCRXIE;                       // Disable RX interrupt

    UCB0IE |= UCTXIE;                        // Enable TX interrupt

    UCB0CTL1 |= UCTR + UCTXSTT;             // I2C TX, start condition

    __bis_SR_register(LPM0_bits + GIE);              // Enter LPM0 w/ interrupts

    return MasterMode;

}

I2C_Mode I2C_Master_WriteReg(uint8_t dev_addr, uint8_t reg_addr, uint8_t *reg_data, uint8_t count)

{

    /* Initialize state machine */

    MasterMode = TX_REG_ADDRESS_MODE;

    TransmitRegAddr = reg_addr;

    //Copy register data to TransmitBuffer

    CopyArray(reg_data, TransmitBuffer, count);

    TXByteCtr = count;

    RXByteCtr = 0;

    ReceiveIndex = 0;

    TransmitIndex = 0;

    /* Initialize slave address and interrupts */

    UCB0I2CSA = dev_addr;

    UCB0IFG &= ~(UCTXIFG + UCRXIFG);       // Clear any pending interrupts

    UCB0IE &= ~UCRXIE;                       // Disable RX interrupt

    UCB0IE |= UCTXIE;                        // Enable TX interrupt

    UCB0CTL1 |= UCTR + UCTXSTT;             // I2C TX, start condition

    __bis_SR_register(LPM0_bits + GIE);              // Enter LPM0 w/ interrupts

    return MasterMode;

}

void CopyArray(uint8_t *source, uint8_t *dest, uint8_t count)

{

    uint8_t copyIndex = 0;

    for (copyIndex = 0; copyIndex < count; copyIndex++)

    {

        dest[copyIndex] = source[copyIndex];

    }

}

//******************************************************************************

// Device Initialization *******************************************************

//******************************************************************************

void initClockTo16MHz()

{

    UCSCTL3 |= SELREF_2;                      // Set DCO FLL reference = REFO

    UCSCTL4 |= SELA_2;                        // Set ACLK = REFO

    __bis_SR_register(SCG0);                  // Disable the FLL control loop

    UCSCTL0 = 0x0000;                         // Set lowest possible DCOx, MODx