JLink V8初始化exynos4412脚本

/**

******************************************************************************

* @author    Maoxiao Hu

* @version   V1.0.1

* @date       Dec-2014

******************************************************************************

* < COPYRIGHT 2014 ISE of SHANDONG UNIVERSITY >

*******************************************************************************

**/

上接博客《jLink V8调试exynos 4412 u-boot的几点补充》，补充JLink初始化4412时钟管理单元CMU的脚本，防止在调试过程中初始化时钟造成JLink断开与CPU的连接。

使用此脚本前，需要将uboot中时钟初始化代码注释掉。

target remote localhost:2331

monitor sleep 100

monitor halt

monitor sleep 500

######################################

#SET PLL LOCKTIME

monitor memU32 0x10044000 = 0x00000960

monitor memU32 0x10040008 = 0x00000190

monitor memU32 0x1003C010 = 0x00000BB8

monitor memU32 0x1003C020 = 0x00000190

######################################

#SET APLL

monitor memU32 0x10044104 = 0x00803800

monitor memU32 0x10044100 = 0x807D0300

monitor sleep 100

#SET MPLL

monitor memU32 0x1004010C = 0x00803800

monitor memU32 0x10040108 = 0x80640300

monitor sleep 100

#SET EPLL

monitor memU32 0x1003C118 = 0x00000080

monitor memU32 0x1003C114 = 0x66010000

monitor memU32 0x1003C110 = 0x80400203

monitor sleep 100

#SET VPLL

monitor memU32 0x1003C128 = 0x00000080

monitor memU32 0x1003C124 = 0x66010000

monitor memU32 0x1003C120 = 0x80480203

monitor sleep 100

######################################

#SET CMU_CPU MUX

monitor memU32 0x10044200 = 0x01000001

monitor sleep 100

#SET CMU_DMC MUX

monitor memU32 0x10040200 = 0x00011000

monitor sleep 100

#SET CMU_TOP MUX

monitor memU32 0x1003C210 = 0x00000110

monitor sleep 100

monitor memU32 0x1003C214 = 0x00011000

monitor sleep 100

#SET CMU_LEFTBUS MUX

monitor memU32 0x10034200 = 0x00000010

monitor sleep 100

#SET CMU_RIGHTBUS MUX

monitor memU32 0x10038200 = 0x00000010

monitor sleep 100

######################################

#SET LEFTBUS DIV

monitor memU32 0x10034500 = 0x00000013

#SET RIGHTBUS DIV

monitor memU32 0x10038500 = 0x00000013

#SET CLK_DIV_DMC0/1

monitor memU32 0x10040500 = 0x00111113

monitor memU32 0x10040504 = 0x01011113

#SET CLK_DIV_CPU0/1

monitor memU32 0x10044500 = 0x01143730

monitor memU32 0x10044504 = 0x00000004

#SET CMU_TOP DIV

monitor memU32 0x1003C510 = 0x01205473

######################################

load

break _start