***TI公司的MSP430F5529的A/D转换模块在P1.6输入端,名称为ADC12,是用12位数字寄存器保存转换结果的AD转换器。
***转换有两个参考电压,最高电压VR+,最低电压VR-作为转换的上下限,高于等于VR+输出0FFF,小于等于VR-输出0000,待转换模拟电压Vin转换后的数字量计算为Data=4095 x (Vin-VR-)/(VR+ -VR-),程序结构如下
#include "msp430F5529.h"
int tt=0,temp,kk;
void delay(int ns)
{
while(ns--);
}
//******A/D转换函数设置*****//
void adc1()
{
P1SEL |=BIT6; //转换模拟信号从P1.6输入,内部集成了转换模块
ADC12CTL0 =ADC12ON + ADC12SHT0_8 + ADC12MSC;
ADC12CTL1 =ADC12SHP + ADC12CONSEQ_2;
ADC12MCTL0=ADC12SREF_0+ADC12INCH_6;
ADC12CTL0 |=ADC12ENC;
//////一次转换结束后产生转换中断调用ADC中断函数////
}
int main(void)
{
WDTCTL = WDTPW + WDTHOLD; // Stop WDT
UCSCTL3 |=SELREF__REFOCLK;
__bis_SR_register(SCG0); //disable the FLL control loop
UCSCTL0=0X0000;// //Set lowest possible DCOx,MODxSCG0
UCSCTL1=DCORSEL_7; //Select DCO range 24MHz opreation
//DCORSEL_x,其中x可选3、4、5、6、7
UCSCTL3=FLLD_0+731; //Set DCO Multiplier for 24MHz
//(N+1)*FLLRef=Fdco
//(731+1)*32768=24MHz
//Set FLL DIV =fDCOCLK/2
/*__bis_SR_register(SCG0); //Enable the FLL control loopSCG0
UCSCTL4 |=SELA__DCOCLK+SELS__XT1CLK+SELM__DCOCLK;//MCLK Source select
UCSCTL5 |=DIVPA_2; //ACLK output divide
UCSCTL6 |=XT1DRIVE_3+XCAP_0; //XT1 cap */
P1DIR |= 0x01; // P1.0 output
TA1CCTL0 = CCIE; // CCR0 interrupt enabled
TA1CCR0 = 100; //计数最大值设置
TA1CTL = TASSEL_2 + MC_2 + TACLR; // SMCLK, contmode, clear TAR
__bis_SR_register(LPM0_bits + GIE); // Enter LPM0, enable interrupts
__no_operation(); // For debugger
}
// Timer1 interrupt service routine
#pragma vector=TIMER1_A0_VECTOR
__interrupt void TIMER1_A0_ISR(void)
{
if(kk==50)
{
kk=0;
P1OUT ^= 0x01;// Toggle P1.0
}
else kk++;
TA1CCR0 += 10000; // 重装
}
#pragma vector=ADC12_VECTOR
__interrupt void ADC12ISR(void)
{
//读取转换结果哟
tt=ADC12MEM0; //转换数据存在12位ADC12MEM0寄存器中
}
ADC12有18个中断源,ADC12IFG0----ADC12IFG15、溢出中断源ADC12OV、ADC12MEMx
ADC12TOV、ADC12_A 转换时间溢出。
当ADC12MEMx存入转换结果的时候,响应的ADC12IFGx位被置位(变1),响应的ADC12IEx位和GIE位也置位产生中断请求。
//************************************************************
// MSP430G2x33/G2x53 Demo - ADC10, Sample A1, 1.5V, TA1 Trig, Set P1.0 if > 0.5V
//
// Description: A1 is sampled 16/second (ACLK/2048) with reference to 1.5V.
// Timer_A is run in upmode and TA1 is used to automatically trigger
// ADC10 conversion, TA0 defines the period. Internal oscillator times sample
// (16x) and conversion (13x). Inside ADC10_ISR if A1 > 0.5Vcc, P1.0 is set,
// else reset. Normal mode is LPM3.
// //* An external watch crystal on XIN XOUT is required for ACLK *//
//
// MSP430G2x33/G2x53
// -----------------
// /|\| XIN|-
// | | | 32kHz
// --|RST XOUT|-
// | |
// >---|P1.1/A1 P1.0 |--> LED
//
// D. Dang
// Texas Instruments Inc.
// December 2010
// Built with CCS Version 4.2.0 and IAR Embedded Workbench Version: 5.10
//********************************************************
#include "msp430g2553.h"
void main(void)
{
WDTCTL = WDTPW + WDTHOLD; // Stop WDT
ADC10CTL1 = SHS_1 + CONSEQ_2 + INCH_1; // TA1 trigger sample start
ADC10CTL0 = SREF_1 + ADC10SHT_2 + REFON + ADC10ON + ADC10IE;
__enable_interrupt(); // Enable interrupts.
TACCR0 = 30; // Delay to allow Ref to settle
TACCTL0 |= CCIE; // Compare-mode interrupt.
TACTL = TASSEL_2 + MC_1; // TACLK = SMCLK, Up mode.
LPM0; // Wait for delay.
TACCTL0 &= ~CCIE; // Disable timer Interrupt
__disable_interrupt();
ADC10CTL0 |= ENC; // ADC10 Enable
ADC10AE0 |= 0x02; // P1.1 ADC10 option select
P1DIR |= 0x01; // Set P1.0 output
TACCR0 = 2048-1; // PWM Period
TACCTL1 = OUTMOD_3; // TACCR1 set/reset
TACCR1 = 2047; // TACCR1 PWM Duty Cycle
TACTL = TASSEL_1 + MC_1; // ACLK, up mode
__bis_SR_register(LPM3_bits + GIE); // Enter LPM3 w/ interrupts
}
// ADC10 interrupt service routine
#pragma vector=ADC10_VECTOR
__interrupt void ADC10_ISR(void)
{
if (ADC10MEM < 0x155) // ADC10MEM = A1 > 0.5V?
P1OUT &= ~0x01; // Clear P1.0 LED off
else
P1OUT |= 0x01; // Set P1.0 LED on
}
#pragma vector=TIMER0_A0_VECTOR
__interrupt void ta0_isr(void)
{
TACTL = 0;
LPM0_EXIT; // Exit LPM0 on return
}
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