//////////////////////////////////////////////////////////////////////////////////////////////////////
RCC_ClkConfig.C
//////////////////////////////////////////////////////////////////////////////////////////////////////
/**
** 文件名称:RCC_ClockConfig.C
** 功能描述:STM32系统时钟配置头文件
** 硬件平台:STM32F10X
** 编译环境:Keil uversion4 IDE
** 库版本 :v3.5.0
** 版本信息:v0.0
** 编写作者:ST Microcontroler
** 编写时间:2011-11-25
** 附加说明:无
** 修改记录:无
**/
/* Includes ------------------------------------------------------------------*/
#include "RCC_ClockConfig.h"
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
RCC_ClocksTypeDef RCC_ClockFreq; //定义RCC时钟频率结构体变量
ErrorStatus HSEStartUpStatus; //枚举状态变量SUCCESS/ERROR
/* Private functions ---------------------------------------------------------*/
/**
* @brief Configures the System clock frequency, HCLK, PCLK2 and PCLK1
* prescalers.
* @param None
* @retval None
*/
//void SetSysClock(void)
//{
///* The System clock configuration functions defined below assume that:
// - For Low, Medium and High density devices an external 8MHz crystal is
// used to drive the System clock.
// - For Connectivity line devices an external 25MHz crystal is used to drive
// the System clock.
// If you are using different crystal you have to adapt those functions accordingly.
// 系统时钟配置函数的定义是基于以下假设:
// 1、对于小容量、中容量和大容量设备通过外部8MHz的晶振来驱动系统时钟。
// 2、对于互联型设备通过外部25MHz的晶振来驱动系统时钟。
// 如果你使用的是不一样的晶振,你必须相应地改编这些函数。
//*/
//
//#if defined SYSCLK_HSE
// SetSysClockToHSE();
//#elif defined SYSCLK_FREQ_24MHz
// SetSysClockTo24();
//#elif defined SYSCLK_FREQ_36MHz
// SetSysClockTo36();
//#elif defined SYSCLK_FREQ_48MHz
// SetSysClockTo48();
//#elif defined SYSCLK_FREQ_56MHz
// SetSysClockTo56();
//#elif defined SYSCLK_FREQ_72MHz
// SetSysClockTo72();
//#endif
//
// /* If none of the define above is enabled, the HSI is used as System clock
// source (default after reset) */
//}
/**
* @brief Selects HSE as System clock source and configure HCLK, PCLK2
* and PCLK1 prescalers.
* 选择HSE作为系统时钟源同时配置HCLK,PCLK2和PCLK1的分频
* @param None
* @retval None
*/
void SetSysClockToHSE(void)
{
/* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------------------------*/
/* RCC system reset(for debug purpose) */
RCC_DeInit();
/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);
/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if (HSEStartUpStatus == SUCCESS)
{
#if !defined STM32F10X_LD_VL && !defined STM32F10X_MD_VL && !defined STM32F10X_HD_VL
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
#ifndef STM32F10X_CL
/* Flash 0 wait state */
FLASH_SetLatency(FLASH_Latency_0);
#else
if (HSE_Value <= 24000000)
{
/* Flash 0 wait state */
FLASH_SetLatency(FLASH_Latency_0);
}
else
{
/* Flash 1 wait state */
FLASH_SetLatency(FLASH_Latency_1);
}
#endif /* STM32F10X_CL */
#endif /* STM32F10X_LD_VL && STM32F10X_MD_VL */
/* HCLK = SYSCLK */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK2 = HCLK */
RCC_PCLK2Config(RCC_HCLK_Div1);
/* PCLK1 = HCLK */
RCC_PCLK1Config(RCC_HCLK_Div1);
/* Select HSE as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_HSE);
/* Wait till PLL is used as system clock source */
while (RCC_GetSYSCLKSource() != 0x04)
{}
}
else
{ /* If HSE fails to start-up, the application will have wrong clock configuration.
User can add here some code to deal with this error
如果HSE启动失败,应用将会有错误的时钟配置。用户可以在此添加以下代码来处理这个错误。
*/
/* Go to infinite loop */
while (1)
{}
}
}
/**
* @brief Sets System clock frequency to 24MHz and configure HCLK, PCLK2
* and PCLK1 prescalers.
* @param None
* @retval None
*/
void SetSysClockTo24(void)
{
/* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------------------------*/
/* RCC system reset(for debug purpose) */
RCC_DeInit();
/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);
/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if (HSEStartUpStatus == SUCCESS)
{
#if !defined STM32F10X_LD_VL && !defined STM32F10X_MD_VL && !defined STM32F10X_HD_VL
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* Flash 0 wait state */
FLASH_SetLatency(FLASH_Latency_0);
#endif /* STM32F10X_LD_VL && STM32F10X_MD_VL */
/* HCLK = SYSCLK */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK2 = HCLK */
RCC_PCLK2Config(RCC_HCLK_Div1);
/* PCLK1 = HCLK */
RCC_PCLK1Config(RCC_HCLK_Div1);
#ifdef STM32F10X_CL
/* Configure PLLs *********************************************************/
/* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */
RCC_PREDIV2Config(RCC_PREDIV2_Div5);
RCC_PLL2Config(RCC_PLL2Mul_8);
/* Enable PLL2 */
RCC_PLL2Cmd(ENABLE);
/* Wait till PLL2 is ready */
while (RCC_GetFlagStatus(RCC_FLAG_PLL2RDY) == RESET)
{}
/* PLL configuration: PLLCLK = (PLL2 / 10) * 6 = 24 MHz */
RCC_PREDIV1Config(RCC_PREDIV1_Source_PLL2, RCC_PREDIV1_Div10);
RCC_PLLConfig(RCC_PLLSource_PREDIV1, RCC_PLLMul_6);
#elif defined STM32F10X_LD_VL || defined STM32F10X_MD_VL || defined STM32F10X_HD_VL
/* PLLCLK = (8MHz/2) * 6 = 24 MHz */
RCC_PREDIV1Config(RCC_PREDIV1_Source_HSE, RCC_PREDIV1_Div2);
RCC_PLLConfig(RCC_PLLSource_PREDIV1, RCC_PLLMul_6);
#else
/* PLLCLK = 8MHz * 3 = 24 MHz */
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_3);
#endif
/* Enable PLL */
RCC_PLLCmd(ENABLE);
/* Wait till PLL is ready */
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{}
/* Select PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
while (RCC_GetSYSCLKSource() != 0x08)
{}
}
else
{ /* If HSE fails to start-up, the application will have wrong clock configuration.
User can add here some code to deal with this error */
/* Go to infinite loop */
while (1)
{}
}
}
#if !defined STM32F10X_LD_VL && !defined STM32F10X_MD_VL && !defined STM32F10X_HD_VL
/**
* @brief Sets System clock frequency to 36MHz and configure HCLK, PCLK2
* and PCLK1 prescalers.
* @param None
* @retval None
*/
void SetSysClockTo36(void)
{
/* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------------------------*/
/* RCC system reset(for debug purpose) */
RCC_DeInit();
/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);
/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if (HSEStartUpStatus == SUCCESS)
{
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* Flash 1 wait state */
FLASH_SetLatency(FLASH_Latency_1);
/* HCLK = SYSCLK */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK2 = HCLK */
RCC_PCLK2Config(RCC_HCLK_Div1);
/* PCLK1 = HCLK */
RCC_PCLK1Config(RCC_HCLK_Div1);
#ifdef STM32F10X_CL
/* Configure PLLs *********************************************************/
/* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */
RCC_PREDIV2Config(RCC_PREDIV2_Div5);
RCC_PLL2Config(RCC_PLL2Mul_8);
/* Enable PLL2 */
RCC_PLL2Cmd(ENABLE);
/* Wait till PLL2 is ready */
while (RCC_GetFlagStatus(RCC_FLAG_PLL2RDY) == RESET)
{}
/* PLL configuration: PLLCLK = (PLL2 / 10) * 9 = 36 MHz */
RCC_PREDIV1Config(RCC_PREDIV1_Source_PLL2, RCC_PREDIV1_Div10);
RCC_PLLConfig(RCC_PLLSource_PREDIV1, RCC_PLLMul_9);
#else
/* PLLCLK = (8MHz / 2) * 9 = 36 MHz */
RCC_PLLConfig(RCC_PLLSource_HSE_Div2, RCC_PLLMul_9);
#endif
/* Enable PLL */
RCC_PLLCmd(ENABLE);
/* Wait till PLL is ready */
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{}
/* Select PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
while (RCC_GetSYSCLKSource() != 0x08)
{}
}
else
{ /* If HSE fails to start-up, the application will have wrong clock configuration.
User can add here some code to deal with this error */
/* Go to infinite loop */
while (1)
{}
}
}
/**
* @brief Sets System clock frequency to 48MHz and configure HCLK, PCLK2
* and PCLK1 prescalers.
* @param None
* @retval None
*/
void SetSysClockTo48(void)
{
/* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------------------------*/
/* RCC system reset(for debug purpose) */
RCC_DeInit();
/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);
/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if (HSEStartUpStatus == SUCCESS)
{
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* Flash 1 wait state */
FLASH_SetLatency(FLASH_Latency_1);
/* HCLK = SYSCLK */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK2 = HCLK */
RCC_PCLK2Config(RCC_HCLK_Div1);
/* PCLK1 = HCLK/2 */
RCC_PCLK1Config(RCC_HCLK_Div2);
#ifdef STM32F10X_CL
/* Configure PLLs *********************************************************/
/* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */
RCC_PREDIV2Config(RCC_PREDIV2_Div5);
RCC_PLL2Config(RCC_PLL2Mul_8);
/* Enable PLL2 */
RCC_PLL2Cmd(ENABLE);
/* Wait till PLL2 is ready */
while (RCC_GetFlagStatus(RCC_FLAG_PLL2RDY) == RESET)
{}
/* PLL configuration: PLLCLK = (PLL2 / 5) * 6 = 48 MHz */
RCC_PREDIV1Config(RCC_PREDIV1_Source_PLL2, RCC_PREDIV1_Div5);
RCC_PLLConfig(RCC_PLLSource_PREDIV1, RCC_PLLMul_6);
#else
/* PLLCLK = 8MHz * 6 = 48 MHz */
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_6);
#endif
/* Enable PLL */
RCC_PLLCmd(ENABLE);
/* Wait till PLL is ready */
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{}
/* Select PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
while (RCC_GetSYSCLKSource() != 0x08)
{}
}
else
{ /* If HSE fails to start-up, the application will have wrong clock configuration.
User can add here some code to deal with this error */
/* Go to infinite loop */
while (1)
{}
}
}
/**
* @brief Sets System clock frequency to 56MHz and configure HCLK, PCLK2
* and PCLK1 prescalers.
* @param None
* @retval None
*/
void SetSysClockTo56(void)
{
/* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------------------------*/
/* RCC system reset(for debug purpose) */
RCC_DeInit();
/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);
/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if (HSEStartUpStatus == SUCCESS)
{
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* Flash 2 wait state */
FLASH_SetLatency(FLASH_Latency_2);
/* HCLK = SYSCLK */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK2 = HCLK */
RCC_PCLK2Config(RCC_HCLK_Div1);
/* PCLK1 = HCLK/2 */
RCC_PCLK1Config(RCC_HCLK_Div2);
#ifdef STM32F10X_CL
/* Configure PLLs *********************************************************/
/* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */
RCC_PREDIV2Config(RCC_PREDIV2_Div5);
RCC_PLL2Config(RCC_PLL2Mul_8);
/* Enable PLL2 */
RCC_PLL2Cmd(ENABLE);
/* Wait till PLL2 is ready */
while (RCC_GetFlagStatus(RCC_FLAG_PLL2RDY) == RESET)
{}
/* PLL configuration: PLLCLK = (PLL2 / 5) * 7 = 56 MHz */
RCC_PREDIV1Config(RCC_PREDIV1_Source_PLL2, RCC_PREDIV1_Div5);
RCC_PLLConfig(RCC_PLLSource_PREDIV1, RCC_PLLMul_7);
#else
/* PLLCLK = 8MHz * 7 = 56 MHz */
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_7);
#endif
/* Enable PLL */
RCC_PLLCmd(ENABLE);
/* Wait till PLL is ready */
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{}
/* Select PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
while (RCC_GetSYSCLKSource() != 0x08)
{}
}
else
{ /* If HSE fails to start-up, the application will have wrong clock configuration.
User can add here some code to deal with this error */
/* Go to infinite loop */
while (1)
{}
}
}
/**
* @brief Sets System clock frequency to 72MHz and configure HCLK, PCLK2
* and PCLK1 prescalers.
* @param None
* @retval None
*/
void SetSysClockTo72(void)
{
/* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------------------------*/
/* RCC system reset(for debug purpose) */
/*Step1:将所有的RCC外设寄存器重设为默认值*/
RCC_DeInit();
/* Enable HSE */
/*Step2:启用外部高速晶振(HSE)*/
RCC_HSEConfig(RCC_HSE_ON);
/* Wait till HSE is ready */
/*Step3:等待,直到外部高速晶振稳定*/
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if (HSEStartUpStatus == SUCCESS)
{
/* Enable Prefetch Buffer */
/*Step4:设置预取指缓存使能*/
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* Flash 2 wait state */
/*Step5:设置代码延时值,FLASH_Latency_2,2延时周期*/
FLASH_SetLatency(FLASH_Latency_2);
/* HCLK = SYSCLK */
/*Step6:设置AHB时钟(HCLK)等于系统时钟*/
//RCC_SYSCLK_Div1: AHB时钟 = 系统时钟
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK2 = HCLK */
/*Step7:设置高速APB2时钟(PCLK2)为系统时钟*/
//RCC_HCLK_Div1: APB2时钟 = HCLK
RCC_PCLK2Config(RCC_HCLK_Div1);
/* PCLK1 = HCLK/2 */
/*Step8:设置低速APB1时钟(PCLK1)为系统时钟的1/2.APB1时钟最高为36MHz*/
//RCC_HCLK_Div2: APB1时钟 = HCLK/2
RCC_PCLK1Config(RCC_HCLK_Div2);
/*Step9:设置PLL时钟源及倍频系数,经PLL倍频后的最高时钟为72MHz*/
#ifdef STM32F10X_CL//如果是互联型设备
/* Configure PLLs *********************************************************/
/* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */
RCC_PREDIV2Config(RCC_PREDIV2_Div5);
RCC_PLL2Config(RCC_PLL2Mul_8);
/* Enable PLL2 */
RCC_PLL2Cmd(ENABLE);
/* Wait till PLL2 is ready */
while (RCC_GetFlagStatus(RCC_FLAG_PLL2RDY) == RESET)
{}
/* PLL configuration: PLLCLK = (PLL2 / 5) * 9 = 72 MHz */
RCC_PREDIV1Config(RCC_PREDIV1_Source_PLL2, RCC_PREDIV1_Div5);
RCC_PLLConfig(RCC_PLLSource_PREDIV1, RCC_PLLMul_9);
#else//如果是其他类型的设备
/* PLLCLK = 8MHz * 9 = 72 MHz */
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
#endif
/* Enable PLL */
/*Step10:使能PLL*/
RCC_PLLCmd(ENABLE);
/* Wait till PLL is ready */
/*Step11:等待PLL初始化成功*/
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{}
/* Select PLL as system clock source */
/*Step12:设置PLL为系统时钟源(SYSCLK)*/
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
/*Step13:等待PLL成功用于系统时钟的时钟源*/
//0x00:HSI作为系统时钟
//0x04:HSE作为系统时钟
//0x08:PLL作为系统时钟
while(RCC_GetSYSCLKSource() != 0x08)
{}
}
else
{ /* If HSE fails to start-up, the application will have wrong clock configuration.
User can add here some code to deal with this error
如果HSE启动失败,应用将会有错误的时钟配置。用户可以在此添加以下代码来处理这个错误。
*/
/* Go to infinite loop */
while (1)
{}
}
}
#endif /* STM32F10X_LD_VL && STM32F10X_MD_VL */
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
//////////////////////////////////////////////////////////////////////////////////////////////////////
RCC_ClkConfig.H
//////////////////////////////////////////////////////////////////////////////////////////////////////
/**
** 文件名称:RCC_ClockConfig.H
** 功能描述:STM32系统时钟配置头文件声明
** 硬件平台:STM32F10X
** 编译环境:Keil uversion4 IDE
** 库版本 :v3.5.0
** 版本信息:v0.0
** 编写作者:ST Microcontroler
** 编写时间:2011-11-25
** 附加说明:无
** 修改记录:无
**/
/* Define to prevent recursive inclusion (定义防止被递归包含)-----------------*/
#ifndef __RCC_CLOCKCONFIG_H
#define __RCC_CLOCKCONFIG_H
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x.h"
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Uncomment the line corresponding to the desired System clock (SYSCLK)
frequency (after reset the HSI is used as SYSCLK source)
去掉与想要设置的系统时钟频率一致的行的注释,不使用宏定义的方式来声明
系统时钟频率,改为直接调用相应的函数来实现(2011-11-25) */
//#define SYSCLK_HSE
//#define SYSCLK_FREQ_24MHz
//#if !defined STM32F10X_LD_VL && !defined STM32F10X_MD_VL && !defined STM32F10X_HD_VL
// //#define SYSCLK_FREQ_36MHz
// //#define SYSCLK_FREQ_48MHz
// //#define SYSCLK_FREQ_56MHz
// #define SYSCLK_FREQ_72MHz
//#endif
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
//void SetSysClock(void);
void SetSysClockToHSE(void);
void SetSysClockTo24(void);
void SetSysClockTo36(void);
void SetSysClockTo48(void);
void SetSysClockTo56(void);
void SetSysClockTo72(void);
#endif /* __RCC_CLOCKCONFIG_H */
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
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