STM32时钟配置，不同晶振时需要配置的程序

在“stm32f10x.h”这个头文件里： 
#define HSE_Value ((uint32_t)8000000) /!< Value of the External oscillator in Hz/ 
斜体内容默认是8000000，在你修改了外部晶振时，要和你的外部晶振数值相同，不如我的外部晶振时24M，我就把它改成24M，这样就可以了， 
还有一处要更改是在“system_stm32f10x.c”里： 
static void SetSysClockTo72(void) 
{ 
__IO uint32_t StartUpCounter = 0, HSEStatus = 0;

/!< SYSCLK, HCLK, PCLK2 and PCLK1 configuration —————————/ 
/!< Enable HSE / 
RCC->CR |= ((uint32_t)RCC_CR_HSEON);

/!< Wait till HSE is ready and if Time out is reached exit / 
do 
{ 
HSEStatus = RCC->CR & RCC_CR_HSERDY; 
StartUpCounter++; 
} while((HSEStatus == 0) && (StartUpCounter != HSEStartUp_TimeOut));

if ((RCC->CR & RCC_CR_HSERDY) != RESET) 
{ 
HSEStatus = (uint32_t)0x01; 
} 
else 
{ 
HSEStatus = (uint32_t)0x00; 
}

if (HSEStatus == (uint32_t)0x01) 
{ 
/!< Enable Prefetch Buffer / 
FLASH->ACR |= FLASH_ACR_PRFTBE;

/*!< Flash 2 wait state */

FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);

FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2;    

/*!< HCLK = SYSCLK */

RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;//1

/*!< PCLK2 = HCLK */

RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1;//1

/*!< PCLK1 = HCLK */

RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2;//2

/*!< PLLCLK = 8MHz * 9 = 72 MHz */

RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL));

RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL3 );//RCC_CFGR_PLLMULL9

/*!< Enable PLL */

RCC->CR |= RCC_CR_PLLON;

/*!< Wait till PLL is ready */

while((RCC->CR & RCC_CR_PLLRDY) == 0)

{

}

/*!< Select PLL as system clock source */

RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));

RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL;    

/*!< Wait till PLL is used as system clock source */

while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08)

{

}

} 

else 

{ /*!< If HSE fails to start-up, the application will have wrong clock 

configuration. User can add here some code to deal with this error */

/*!< Go to infinite loop */

while (1)

{

}

} 

}

endif

/** 

* @} 

*/ 

“RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL3 );”给成你合适的倍数，不要超频