LTC2311特性及演示板2425A主要特性

发布者:幸福的时光最新更新时间:2018-04-29 来源: 社区化关键字:Linear公司  SAR 手机看文章 扫描二维码
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    Linear公司的LTC2311-16是低噪音高速16位SAR5MspsADC,差分输入和宽输入共模范围,单电源3.3V或5V工作,差分输入范围8VP-P,fIN = 2.2MHz时的SNR为81dB,THD为-90dB,16位时±3LSB INL,不会丢失码,主要用在高速数据采集系统,通信,遥控数据采集,图像,光网络,汽车电子和对相马达控制。本文介绍了LTC2311特性,框图,应用电路以及演示板2425A主要特性,连接图,电路图,材料清单和PCB元件布局图。

    

  The LTCR2311-16 is a low noise, high speed 16-bitsuccessive approximaTIon register (SAR) ADC withdifferenTIal inputs and wide input common mode range.


  OperaTIng from a single 3.3V or 5V supply, the LTC2311-16 has an 8VP-P differenTIal input range, making it idealfor applications which require a wide dynamic range withhigh common mode rejection. The LTC2311-16 achieves±3LSB INL typical, no missing codes at 16 bits and 81dBSNR typical.


  The LTC2311-16 has an onboard low drift (20ppm/℃ max)2.048V or 4.096V temperature-compensated reference andprovides an external 1.25V buffered reference input. TheLTC2311-16 also has a high speed SPI-compatible serialinterface that supports CMOS or LVDS. The fast 5Mspsthroughput with one-cycle latency makes the LTC2311-16ideally suited for a wide variety of high speed applications.


  The LTC2311-16 dissipates only 50mW with a 5V supplyand offers nap and sleep modes to reduce the powerconsumption to 5μW for further power savings duringinactive periods.


  LTC2311特性:


  5Msps Throughput Rate

  ±3LSB INL (Typ), ±8LSB INL Guaranteed

  Guaranteed 16-Bit, No Missing Codes

  8VP-P Differential Inputs with Wide Input CommonMode Range

  81dB SNR (Typ) at fIN = 2.2MHz

  –90dB THD (Typ) at fIN = 2.2MHz

  Guaranteed Operation –40℃ to 125℃

  Single 3.3V or 5V Supply

  Low Drift (20ppm/℃ Max) 2.048V or 4.096V InternalReference with 1.25V External Reference Input


  1.8V to 2.5V I/O Voltages

  CMOS or LVDS SPI-Compatible Serial I/O

  Power Dissipation 50mW at VDD = 5V (Typ)

  Small 16-Lead (4mm × 5mm) MSOP Package

  LTC2311应用:

  High Speed Data Acquisition Systems

  Communications

  Remote Data Acquisition

  Imaging

  Optical Networking

  Automotive

  Multiphase Motor Control


图1.LTC2311框图:CMOS I/O模式

图2.LTC2311框图:LVDS I/O模式

  图3.LTC2311全差分应用电路


  演示板2425A


  Demonstration circuit 2425A features the LTC®2311 family.With up to 5Msps, these differential, single channel, 16-bit,serial, high speed successive approximation register(SAR) ADCs are available in a 16-lead MSOP package.


  The LTC2311 family has an internal 20ppm/°C maximumdrift reference and an SPI-compatible serial interface thatsupports CMOS and LVDS logic. Note the demo board isconfigured for CMOS operation by default; see the noteunder JP3 for LVDS operation. The following text refersto the LTC2311, but applies to all members of the family,the only difference being the sample rate and/or thenumber of bits. The DC2425A demonstrates the DC andAC performance of the LTC2311 in conjunction with theDC890 PScope™ data collection board. 


Alternatively, byconnecting the DC2425A into a customer application, theperformance of the LTC2311 can be evaluated directly inthat circuit.

图4.演示板2425A连接示意图

图5.演示板2425A电路图(1)

图6.演示板2425A电路图(2)


演示板2425A材料清单(BOM):


图7.演示板2425A PCB元件布局

关键字:Linear公司  SAR 引用地址:LTC2311特性及演示板2425A主要特性

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