IEEE 1149.7将取代IEEE 1149.1

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With IEEE 1149.7 now a fully approved standard, semiconductor manufacturers and test/debug system providers are migrating toward IEEE 1149.7 (Compact JTAG) as the new test and debug interface for semiconductors and systems. Major semiconductor providers are now adding Compact JTAG to their chips, as evidenced by both sales of Compact JTAG IP and announcements from industry leaders such as Freescale <http://www.responsetrack.net/lnk/freescale/19jji/?168MW02BGE5>  and Texas Instruments <http://www.responsetrack.net/lnk/ti/19jjj/?168MW02BGE5> . Development system providers such as Lauterbach <http://www.responsetrack.net/lnk/lauterbach/19jjk/?168MW02BGE5>  are supporting Compact JTAG and the Nexus 5001 Forum is including Compact JTAG support in the IEEE-ISTO 5001-2010 standard.
      虽然目前IEEE 1149.1是业界公认的标准，半导体制造商和测试系统供应商正在逐渐采用IEEE 1149.7(Compact JTAG)作为新的测试/调试接口。从Compact JTAG的销售人员口中和Freescale、TI这样的业界领导者的公告里都可以得知，世界上主要的半导体供应商都在他们的芯片上添加了Compact JTAG接口。像Lauterbach这样的开发系统供应商正在对Compact JTAG提供支持。Nexus 5001论坛也正在把Compact JTAG加入IEEE-ISTO 5001-2010标准中。

Adding Compact JTAG functionality to your chip design now ensures that your on-chip test and debug functions can fully benefit from this growing ecosystem of Compact JTAG enabled semiconductors, test equipment, and development systems.
      把Compact JTAG添加到芯片中可以确保片上测试和调试可以从那些正在增长的拥有Compact JTAG功能的半导体测试设备和开发系统中获益

What is Compact JTAG?
什么是Compact JTAG?

The IEEE 1149.7 specification, approved and published in early 2010, defines a new test/debug infrastructure that extends IEEE 1149.1 (JTAG) to address the needs of modern systems. Features of IEEE 1149.7 (also known as Compact JTAG) include:
      在2010年初公布的这项IEEE 1149.7（Compact JTAG）标准定义了一个新的测试/调试基础架构来满足最新的系统需求。其功能包括：

• 2-pin operation 两管脚操作
• Star scan topologies  星形扫面拓扑结构
• Shorter scan paths through direct TAP addressability and  enhanced bypass features 通过直接TAP处理和加强的旁路功能实现更短的扫描路径  
• Efficient use of the 2-pin interface for software  development and system debug  软件开发和系统调试可以有效地利用其两管脚界面
• Power-down of on-chip debug logic when not in use  对不用的片上调试逻辑进行断电
• Interoperability with devices that still use an IEEE 1149.1  (JTAG) test access port (TAP) 可以和使用IEEE 1149.1  (JTAG)测试访问接口的部件进行互操作
Some of the benefits of using Compact JTAG are: 使用Compact JTAG的一些好处：
• A single 2-pin interface to support both test and debug  operations  支持测试和调试的单独的两管脚界面
• Faster scans (shorter path to the TAP of interest in a  multi-TAP system)  更快的扫面
• Power savings through power-down of debug logic 省电

2-pin operation means fewer IC pins dedicated to test/debug and a dramatically shorter path to the target of interest compared to JTAG serial scan 
      与之前的JTAG串行扫描相比，两管脚操作意味着用于测试和调试的IC管脚变得更少，以及距离关注目标更短的路径

How do I add Compact JTAG to a chip?
我如何把Compact JTAG加到芯片中？

The fastest and simplest way to add Compact JTAG support to a chip is to integrate the Compact JTAG IP from IPextreme, as Texas Instruments and other major semiconductor providers have already done. The Compact JTAG IP from IPextreme is a silicon-proven design that implements class T0-T5 TAP functionality as defined by IEEE 1149.7, providing an IEEE 1149.7 compliant interface to the off-chip debug/test system (DTS) and an IEEE 1149.1 interface to one or more on-chip IEEE 1149.1 TAPs. For non-scan operations using the IEEE 1149.7 transport function, the Compact JTAG IP also provides the on-chip data channel interface defined by IEEE 1149.7. Dedicated on-chip interfaces are also available for optional Compact JTAG features such as TAP power-down, functional logic reset, and interfacing to a segmented scan client such as a FIFO or DMA controller.
      就像TI和其他主要半导体供应商所做的那样，把Compact JTAG加到芯片中最快而且最简单的方法是整合IPextreme的Compact JTAG IP。IPextreme的Compact JTAG IP是一个经过充分验证的设计。它实现了IEEE 1149.7定义的T0~T5的测试访问接口功能，提供与IEEE 1149.7片外测试/调试系统兼容的接口以及一个到片上IEEE 1149.1测试访问接口的界面。这个Compact JTAG IP也提供了片上的数据通道让一些非扫描操作使用IEEE 1149.7的传输功能。还有针对Compact JTAG可选功能，如测试访问接口断电，逻辑复位，和FIFO/DMA控制器等分段扫描单元的链接等的特定的片上界面
 
Compact JTAG IP connects to on-chip JTAG TAP(s) for scan operations and (optionally) to on-chip data channel clients for non-scan data transport operations
      Compact JTAG IP连接到片上JTAG测试访问接口进行扫面操作，也可以连接到片上数据通道进行非扫描数据传输工作

How do I use the new IEEE 1149.7 features?
我该怎么使用IEEE 1149.7的新功能？

The Compact JTAG IP hides the IEEE 1149.7 protocol from your on-chip IEEE 1149.1 TAP(s). So, little (if any) change is required for your on-chip IEEE 1149.1 test/debug infrastructure. It is up to the external DTS to take advantage of your chip's new Compact JTAG capabilities. Commercial tools supporting Compact JTAG are already available, including the TRACE32 development system from Lauterbach Development Tools, which was developed using the Compact JTAG IP core from IPextreme as the reference Compact JTAG implementation.
      Compact JTAG IP 中，IEEE 1149.7协议相对于片上IEEE 1149.1测试访问接口来说是隐藏的。因此，片上的IEEE 1149.1测试/调试基础构件几乎不需要做任何变化。它取决于外部的DTS是否要利用芯片中的Compact JTAG功能。市场上支持Compact JTAG的商业工具已经出现了，如Lauterbach Development Tools的TRACE32开发系统，它的实现基于IPextreme 公司的Compact JTAG IP内核。

You can also extend an existing IEEE 1149.1 DTS to support Compact JTAG by using the DTS Adapter, which is also available from IPextreme. The DTS Adapter generates the hardware signaling needed for Compact JTAG-specific functions such as Escape Sequences and 2-pin operation, so that you only need to upgrade your DTS software to achieve all the benefits of Compact JTAG.
      你也可以使用同样来自IPextreme 公司的DTS适配器来把你IEEE 1149.1 DTS进行扩展一遍支持Compact JTAG。这个DTS适配器会为Compact JTAG特有的功能，如Escape Sequences和两管脚操作，产生硬件信号。因而你只需要升级你的DTS软件就可以享受到Compact JTAG的所有好处。

For simulation and compliance testing, Globetech Solutions offers IEEE 1149.7 verification IP (VIP), supporting verification of IEEE 1149.7 implementations at block, chip, and board-level of integration.
      对于仿真和一致性测试，Globetech Solutions提供了IEEE 1149.7验证的IP。可以用来对IEEE 1149.7的模块级，芯片级，以及板级整合的实现进行验证

Getting started

The emergence of new products supporting IEEE 1149.7 and inclusion of IEEE 1149.7 in the IEEE-ISTO 5001-2010 standard show that Compact JTAG is here to stay. And the Compact JTAG IP from IPextreme, in use today in chips from major semiconductor providers and fully verified with the Globetech IEEE 1149.7 compliance suite, is the industry's standard Compact JTAG IP solution.
      支持IEEE 1149.7的新产品的出现以及IEEE 1149.7进入EEE-ISTO 5001-2010标准都表明了Compact JTAG已经开始普遍使用。IPextreme公司的Compact JTAG IP由于被应用于世界上主要半导体产商的的芯片中并经过了Globetech IEEE 1149.7一致性套件的完整验证，已经成为工业界标准的Compact JTAG IP。

Adding the Compact JTAG IP to your chip ensures that the chip will benefit from the features offered by the debug/test environment in which it is connected--from fully IEEE 1149.1 compliant operation in an IEEE 1149.1 (JTAG) test environment to highly-optimized trace/debug data transfer over a 2-pin interface when operating with an IEEE 1149.7 (Compact JTAG) capable development system.
      在你的芯片中添加Compact JTAG IP可以保证让你的芯片既可以享受到与IEEE 1149.1相兼容的操作功能，而且也可以用到Compact JTAG开发系统中高度优化的追踪/调试数据两管脚传输的界面。

To learn more about IEEE 1149.7 and the Compact JTAG IP core, visit www.ip-extreme.com <http://www.responsetrack.net/lnk/ip-extreme/19jjx/?168MW02BGE5>  or contact us directly at info@ip-extreme.com <http://www.responsetrack.net/lnk/boomerang/19jjn/?168MW02BGE5> .
      要想了解关于Compact JTAG IP更多的信息，请访问以上网站或直接通过info@ip-extreme.com和我们联系