Exynos4412裸机程序之DDR3初始化流程

在三星提供的数据手册《SEC_Exynos4412_Users Manual_Ver.1.00.00》的第1046页提供给了一段关于LPDDR2-S4的初始化步骤，LPDDR2表示低功耗DDR2，DDR3的初始化过程应和这个一样，我们就按这个过程来初始化DDR3：

DDR 大体初始化流程

上图告诉我们如何初始化DDR2类型的DRAM，主要分为：

初始化PHY DLL

初始化控制寄存器

初始化DRAM

三大步骤，具体细分共21个小步骤下面我们就从数据手册提供的步骤开始熟悉一下流程：

LPDDR2初始化步骤

由上图所知，步骤如下：

18.3.1 LPDDR2-S4

Use the sequence given here to initialize LPDDR2 devices. Unlessspecified otherwise, these steps are

mandatory. Note that the memory CK/CKn must be less than or equal to50 MHz before you initialize the

LPDDR2-S4 device.

1.  DMC must assert and holdCKE to a logic low level to provide stable power for memory device and thenapply

stable clock.

2.  Set thePhyControl0.ctrl_start_point and PhyControl0.ctrl_inc bit-fields to a correctvalue according to clock

frequency. Set the PhyControl0.ctrl_dll_on bit-field to"1" to activate the PHY DLL.

3.  DQS cleaning: Set thePhyControl1.ctrl_shiftc and PhyControl1.ctrl_offsetc bit-fields to theappropriate value

according to clock frequency, board delay, and memory tDQSCKparameter.

4.  Set thePhyControl0.ctrl_start bit-field to "1".

5.  Set the ConControl. Atthis moment, an auto-refresh counter should be disabled.

6.  Set the MemControl. Atthis moment, all power down modes should be disabled.

7.  Set the MemConfig0register. When there are two external memory chips, set the MemConfig1register.

8.  Set the PrechConfig andPwrdnConfig registers.

9.  Set the TimingAref,TimingRow, TimingData, and TimingPower registers according to memory AC

parameters.

10.  Set the QosControl0 to 15and QosConfig0 to 15 registers when a certain bus master requires QoS scheme.

11.  Wait for thePhyStatus0.ctrl_locked bit-fields to change to "1". Verify whetherPHY DLL is locked.

PHY DLL compensates the changes of delay amount that pressure,volume, and temperature variation

causes during memory operation. Therefore, you should not power offPHY DLL for reliable operation.

It can be in power-off mode except when it runs at low frequency.When you use the power-off mode,

set the PhyControl0.ctrl_force bit-field to the correct valueaccording to the PhyStatus0.ctrl_lock_value[9:2]

bit-field for fix delay amount. Clear the PhyControl0.ctrl_dll_onbit-field to turn off PHY DLL.

12.  Set thePhyControl1.fp_resync bit-field to "1" to update DLL information.

13.  Confirm that Clock Enable(CKE) is in a logic low level at least 100ns after power on.

14.  Issue a NOP command byusing the DirectCmd register to assert and hold CKE to a logic high level.

15.  Wait for a minimum of 200s.

16.  Issue a MRS command byusing the DirectCmd register to reset memory devices and program the operating

parameters.

17.  Wait for minimum of 1 s.

18.  Issue a MRR command byusing the DirectCmd register to poll the DAI bit of the MRStatus register.

This is to know whether or not Device Auto-Initialization iscomplete.

19.  If there are two externalmemory chips, execute step 14 to 19 for chip1 memory device.

20.  Set the ConControl toturn on an auto-refresh counter.

21.  Set MemControl registerwhen you require power-down modes.

翻译上面的步骤:

1、DMC功能必须设置，并且要保持CKE为低电平，以便可以提供稳定的电源和时钟给DDR

2、根据时钟频率设置PhyControl0.ctrl_start_point 和PhyControl0.ctrl_inc bit-fields，并且设置PhyControl0.ctrl_dll_on bit-field 为 "1" 已启动PHY DLL。

3、DQS 清除，根据时钟频率、板子延时和芯片的tDQSCK参数设置PhyControl1.ctrl_shiftc 和PhyControl1.ctrl_offsetcbit-fields。

4、设置 PhyControl0.ctrl_start bit-field 为"1"。

5、设置ConControl，此时，不能使能自动刷新计数器（auto-refresh counter ）。

6. 设置MemControl，此时，所有的power down模式应关闭。

7、设置MemConfig0 寄存器，当外面有两片存储芯片时，设置MemConfig1寄存器。

8、设置 PrechConfig和 PwrdnConfig寄存器。

9、根据DDR3的 AC参数设置TimingAref, TimingRow, TimingData, 和 TimingPower寄存器。

10、当总线主控者需要QoS时序参数时，设置QosControl0 到15寄存器和QosConfig0 到 15寄存器。

11、等待 PhyStatus0.ctrl_locked bit-fields 变成 "1"，以确定 PHY DLL 是否锁定。PHY DLL 可以补偿压力、体积？和温度等环境的变化，因为在芯片工作期间，我们不能关闭了PHY DLL的电源，只有当他在低的时钟频率时才可以切换到Power-off 模式，当我们用power-off 模式，参考PhyStatus0.ctrl_lock_value[9:2]的延时参数来设置PhyControl0.ctrl_forcebit-field，清楚PhyControl0.ctrl_dll_on bit-field来关闭 PHY DLL。

12、设置PhyControl1.fp_resync bit-field 为 "1" 来更新 DLL的设置。

13、确保在电源上电后至少保持Clock Enable (CKE)在低电平100ns。

14、用DirectCmd 寄存器来执行一条NOP指令且保持CKE 为高电平。

15、至少等待200us。

16、发出MRS指令来重新设置存储芯片的操作参数。

17、至少等待1us。

18、用MRR指令来查询MRStatus的寄存器的DAI位，用这们来确定自动初始化过程是否完成。

19、如果外部有别的存储芯片，重复执行14到19步来设置芯片1。

20、设置ConControl来启动auto-refresh counter.

21、当我们要进行power-down模式，设置MemControl寄存器。

按照上边的步骤来设置就可以完成DDR的初始化，下一节我们进行Tiny4412开发板的DDR操作，将代码重定位到DDR SDRAM。