UBOOT-1.1.6在S3C2410上的移植(基于GEC2410)

/*

 * nand_read.c: Simple NAND read functions for booting from NAND

 *

 * Copyright (C) 2002 MIZI Research, Inc.

 *

 * Author: Hwang, Chideok

 * Date  : $Date: 2002/08/14 10:26:47 $

 *

 * $Revision: 1.6 $

 * $Id: param.c,v 1.9 2002/07/11 06:17:20 nandy Exp

 *

 *

 */

#include

#define __REGb(x)    (*(volatile unsigned char *)(x))

#define __REGi(x)    (*(volatile unsigned int *)(x))

#define NF_BASE        0x4e000000

#define NFCONF        __REGi(NF_BASE + 0x0)

#define NFCMD        __REGb(NF_BASE + 0x4)

#define NFADDR        __REGb(NF_BASE + 0x8)

#define NFDATA        __REGb(NF_BASE + 0xc)

#define NFSTAT        __REGb(NF_BASE + 0x10)

#define BUSY 1

inline void wait_idle(void) {

    int i;

    while(!(NFSTAT & BUSY))

      for(i=0; i<10; i++);

}

#define NAND_SECTOR_SIZE    512

#define NAND_BLOCK_MASK        (NAND_SECTOR_SIZE - 1)

/* low level nand read function */

int

nand_read_ll(unsigned char *buf, unsigned long start_addr, int size)

{

    int i, j;

    if ((start_addr & NAND_BLOCK_MASK) || (size & NAND_BLOCK_MASK)) {

        return -1;    /* invalid alignment */

    }

    /* chip Enable */

    NFCONF &= ~0x800;

    for(i=0; i<10; i++);

    for(i=start_addr; i < (start_addr + size);) {

      /* READ0 */

      NFCMD = 0;

      /* Write Address */

      NFADDR = i & 0xff;

      NFADDR = (i >> 9) & 0xff;

      NFADDR = (i >> 17) & 0xff;

      NFADDR = (i >> 25) & 0xff;

      wait_idle();

      for(j=0; j < NAND_SECTOR_SIZE; j++, i++) {

    *buf = (NFDATA & 0xff);

    buf++;

      }

    }

    /* chip Disable */

    NFCONF |= 0x800;    /* chip disable */

    return 0;

}

接着修改board/gec2410/makefile,增加对nand_read.c的编译

第28行：

COBJS     := gec2410.o flash.o nand_read.o

9.修改cpu/arm920t/start.S文件

2410从Nand Flash启动时,NAND FLASH的前4KB（地址为0x00000000,OM[1:0]=0）将被装载到SDRAM中被称为Setppingstone的地址中,然后开始执行这段代码.启动以后,这4KB的空间可以做其他用途,在start.S加入搬运代码.

主要工作开始初始化NAND控制器,然后调用nand_read.c中的nand_read_ll函数来复制u-boot自身代码到RAM中,最后跳转到RAM中运行.汇编代码如下:

#ifdef CONFIG_S3C2410_NAND_BOOT

    bl    copy_myself

      @ jump to ram

    ldr   r1, =on_the_ram

    add  pc, r1, #0

    nop

    nop

    1:    b     1b          @ infinite loop

on_the_ram:

#endif

/* Set up the stack     */

stack_setup:

#..............

######################################

ldr pc, _start_armboot

_start_armboot: .word start_armboot

#ifdef CONFIG_S3C2410_NAND_BOOT

copy_myself:

    mov r10, lr

@ reset NAND

    mov r1, #NAND_CTL_BASE

     ldr   r2, =0xf830           @ initial value

    str   r2, [r1, #oNFCONF]

    ldr   r2, [r1, #oNFCONF]

    bic  r2, r2, #0x800              @ enable chip

    str   r2, [r1, #oNFCONF]

    mov r2, #0xff         @ RESET command

    strb r2, [r1, #oNFCMD]

    mov r3, #0                   @ wait

1:add  r3, r3, #0x1

    cmp r3, #0xa

    blt   1b

2:ldr   r2, [r1, #oNFSTAT]      @ wait ready

    tst    r2, #0x1

    beq  2b

    ldr   r2, [r1, #oNFCONF]

    orr  r2, r2, #0x800              @ disable chip

    str   r2, [r1, #oNFCONF]

@ get read to call C functions (for nand_read())

    ldr   sp, DW_STACK_START       @ setup stack pointer

    mov fp, #0                    @ no previous frame, so fp=0

@ copy vivi to RAM

    ldr   r0, =UBOOT_RAM_BASE

    mov     r1, #0x0

    mov r2, #0x20000

    bl    nand_read_ll

    tst    r0, #0x0

    beq  ok_nand_read

#ifdef CONFIG_DEBUG_LL

    bad_nand_read:

    ldr   r0, STR_FAIL

    ldr   r1, SerBase

    bl    PrintWord

1:b     1b          @ infinite loop

#endif

ok_nand_read:

#ifdef CONFIG_DEBUG_LL

    ldr   r0, STR_OK

    ldr   r1, SerBase

    bl    PrintWord

#endif

@ verify

    mov r0, #0

    ldr   r1, =UBOOT_RAM_BASE

    mov r2, #0x400     @ 4 bytes * 1024 = 4K-bytes

go_next:

    ldr   r3, [r0], #4

    ldr   r4, [r1], #4

    teq   r3, r4

    bne  notmatch

    subs r2, r2, #4

    beq  done_nand_read

    bne  go_next

notmatch:

#ifdef CONFIG_DEBUG_LL

    sub  r0, r0, #4

    ldr   r1, SerBase

    bl    PrintHexWord

    ldr   r0, STR_FAIL

    ldr   r1, SerBase

    mov r2, #0

     mov r3, r2

    mov r4, r2

    mov r5, r2

    mov r6, r2

    mov r7, r2