内容更新：关于举办“纳米级低功耗容错数字IC设计高级培训班”的通知

附件1：

课程大纲

Day One 第一天

1. Nanoscale IC design challenge

The important design challenges and issues in nanoscale digital integrated circuits

The behaviors of transistors and circuits under the influence of short channel effects

The effects of process variations and temperature on nanoscale transistors and circuits

纳米级IC设计挑战

纳米级数字集成电路中重要的设计挑战和问题

短沟道效应的影响下的晶体管和电路行为

工艺变化和温度对纳米晶体管和电路的影响

2. low power design techniques

The different sources of power consumption in active circuits and idle circuits

The state-of-the-art low power design techniques for reducing dynamic power consumption as well as leakage power consumption

低功耗设计技术

有源电路和空载电路中功耗的不同来源

为减少动态功耗和泄漏功耗的领先低功耗设计技术

3. Power gating I—Fundamentals

Power gating is the most commonly used leakage power reduction technique in idle circuits. In this session, the concept of power gating is introduced. Different implementation styles of power gating are presented. A variety of design challenges for implementing power gating is examined. The methods to size sleep transistors for power-gated circuits are explored. Different techniques to reduce the sizes of sleep transistors are introduced.

电源门控第一部分—原理

电源门控是空载电路中最常用的减少泄漏功率的技术。本部分介绍电源门控设计的概念，并讲述电源门控不同的实现风格。本部分将检视实现电源门控面临的各类设计挑战，还将探讨为电源门控电路确认休眠晶体管尺寸的方法。同时介绍缩小休眠晶体管尺寸的不同技术。

4. Power Gating II—Advanced topics

In order to solve the various design issues with power gating, several advanced topics for implementing power gating are presented in this session. First of all, the mode transition scheduling techniques are explained to reduce the mode transition noise, delay, and energy overhead of power-gated circuits. Afterwards, how to implementing data retention in flip-flops and SRAM circuits are investigated. Finally, the tricks to implement power gating in back-end flow are introduced.

电源门控第二部分—高级主题

为解决电源门控中的各种设计问题，本部分将讲述实现电源门控中的一些高级主题。首先，将解释模式切换调度技术，用以降低电源门控电路的模式切换噪声、延迟和能源开销。之后，将深入研究如何在触发器和SRAM电路中实现数据保留。最后将介绍在后端流程中实现电源门控的技巧。

Day Two 第二天

5. Ultra-low voltage IC design

The energy profile of integrated circuits with voltage scaling is explored. The reasons why people would like to go to subthreshold region or near-threshold region for circuit operations are explained. The behavior of logic circuits in near-/sub-threshold regions is presented. The corresponding design challenges in ultra-low voltage regions are revealed. A new methodology for subthreshold standard cell library design is introduced.

The challenges of SRAM circuit design in ultra-low voltage region are introduced. Different techniques to facilitate ultra-low voltage SRAM circuit design are presented.

超低电压IC设计

将结合电压缩放探讨集成电路的能线图，并解释为什么人们会喜欢去亚阈区或近阈区进行电路操作。讲述亚阈区和近阈区逻辑电路的行为，并揭示超低电压区相应的设计挑战。同时介绍阈下标准单元库的设计的新方法。

本部分将介绍超低电压区域SRAM电路设计面临的挑战，并讲述辅助超低电压SRAM电路设计的不同技术。

6. Error-resilient circuit and system design

The influence of process, temperature, and voltage variations as well as aging and soft errors is so significant that designers have to leave large margins to deal with the worst-case scenario. The concept of “better-than-worst-case” design is introduced in this session. Different circuit techniques to deal with the timing violations under the influence of process, temperature, and voltage variations are explored. Furthermore, techniques to deal with the aging issues are investigated.

容错电路和系统设计

工艺、 温度、电压的变化以及老化和软错误的影响是如此重要，以至于设计者不得不留出大的裕度以应付最坏的情况。此部分将介绍"better-than-worst-case "设计的概念，并探讨在工艺、 温度、电压的变化的影响下处理时序冲突的电路技术。此外，还将深入研究应对老化问题的技术。

附件2：

授课专家简介

Hailong Jiao

埃因霍芬理工大学教授

比利时微电子研究中心IMEC研究员

Hailong Jiao于香港科技大学获得电子和计算机工程博士学位后进入荷兰埃因霍芬理工大学电气工程系的电子系统团队，并被评为教授，同时还兼任比利时微电子研究中心IMEC研究员。他的主要研究领域是低功耗和超低功耗的容错VLSI电路与系统设计，包括容错系统、近似计算、超动态电压缩放、电源-地门控技术、稳健和高能效的电源分布网络、低功耗和稳健存储器电路和容噪声互连等，同时还致力于新兴设备和设备-电路协同设计、3D集成和可制造性设计。他合著并发表在国际性期刊和大会的论文30余篇，并拥有2项专利。他是Elsevier Microelectronics Journal 和World Scientific Journal of Circuits, Systems, and Computers的副编辑，同时担任了多个会议的技术委员会成员，包括：IEEE Asia and South Pacific Design Automation Conference (ASP-DAC 2016)、HiPEAC 2015 (MemTDAC: Memristor Technology, Design, Automation and Computing)、IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2014, 2015)、ACM/SIGDA Great Lakes Symposium on VLSI (GLSVLSI 2011)