记录2--s3c2440 DMA的操作

一.

typedef struct tagDMA

{

    volatile U32 DISRC;     //0x0     DMA初始源寄存器

    volatile U32 DISRCC;    //0x4     DMA初始源控制寄存器

    volatile U32 DIDST;     //0x8     DMA初始目的寄存器

    volatile U32 DIDSTC;    //0xc     DMA初始目的控制寄存器

    volatile U32 DCON;     //0x10    DMA控制寄存器

    volatile U32 DSTAT;     //0x14    DMA状态寄存器

    volatile U32 DCSRC;     //0x18    当前源寄存器

    volatile U32 DCDST;     //0x1c    当前目的寄存器

    volatile U32 DMASKTRIG; //0x20    DMA掩码触发寄存器

}DMA;

void DMA_M2M(int ch,int srcAddr,int dstAddr,int tc,int dsz,int burst)

{

    int i,time;

    volatile U32 memSum0=0,memSum1=0;

    DMA *pDMA;

    int length;

    length=tc*(burst ? 4:1)*((dsz==0)+(dsz==1)*2+(dsz==2)*4); //确定一次传输的字节数( 传输单元模式 * 传输数据宽度 )

    Uart_Printf("[DMA%d MEM2MEM Test]n",ch);

    switch(ch)

    {

    case 0:

        pISR_DMA0 = (unsigned)Dma0Done;

        EnableIrq(BIT_DMA0); //open DMA0 INTERRUPT

    pDMA=(void *)0x4b000000;

    break;

    case 1:

    pISR_DMA1 = (unsigned)Dma1Done;

        EnableIrq(BIT_DMA1); //open DMA1  INTERRUPT

    pDMA=(void *)0x4b000040;

    break;

    case 2:

    pISR_DMA2 = (unsigned)Dma2Done;

        EnableIrq(BIT_DMA2); //open DMA2  INTERRUPT

    pDMA=(void *)0x4b000080;

break;

    case 3:

    pISR_DMA3 = (unsigned)Dma3Done;

        EnableIrq(BIT_DMA3); //open  DMA3  INTERRUPT

        pDMA=(void *)0x4b0000c0;

        break;

    }

    Uart_Printf("DMA%d %8xh->%8xh,size=%xh(tc=%xh),dsz=%d,burst=%dn",ch,

    srcAddr,dstAddr,length,tc,dsz,burst);

    Uart_Printf("Initialize the src.n");

    for(i=srcAddr;i<(srcAddr+length);i+=4)

    {

    *((U32 *)i)=i^0x55aa5aa5;   //向源地址写入任意数据 写入长度为length

    memSum0+=i^0x55aa5aa5;      //将写入数据累加，为校验读出数据的准确性

    }

    Uart_Printf("DMA%d startn",ch);  

    dmaDone=0;

    pDMA->DISRC=srcAddr;        //设置源地址

    pDMA->DISRCC=(0<<1)|(0<<0); //设置源控制寄存器   inc,AHB

    pDMA->DIDST=dstAddr;        //设置目的地址

    pDMA->DIDSTC=(0<<1)|(0<<0); //设置目的控制寄存器 inc,AHB

    pDMA->DCON=(1<<31)|(1<<30)|(1<<29)|(burst<<28)|(1<<27)|

            (0<<23)|(1<<22)|(dsz<<20)|(tc);

    //DMA控制寄存器  HS,AHB sync,enable interrupt,whole, SW request mode,relaod off

    pDMA->DMASKTRIG=(1<<1)|1; //DMA on, SW_TRIG

    Timer_Start(3);//128us resolution     

    while(dmaDone==0);

    time=Timer_Stop();

    Uart_Printf("DMA transfer done.n");

    Uart_Printf("time = %u MSn", time*128/1000);   

    DisableIrq(BIT_DMA0);

    DisableIrq(BIT_DMA1);

    DisableIrq(BIT_DMA2);

    DisableIrq(BIT_DMA3);

    for(i=dstAddr;i    {

    memSum1+=*((U32 *)i)=i^0x55aa5aa5;

    }

    Uart_Printf("n memSum0=%x,memSum1=%xn",memSum0,memSum1);

    if(memSum0==memSum1)

    Uart_Printf("DMA test result--------------------------------------O.K.n");

    else 

    Uart_Printf("DMA test result--------------------------------------ERROR!!!n");

}

二.

测试DMA

void Test_DMA(void)

{

    //DMA Ch 0   _NONCACHE_STARTADDRESS = 0x30400000 

    DMA_M2M(0,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x80000,0,0); //byte,single

    DMA_M2M(0,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x40000,1,0); //halfword,single    

    DMA_M2M(0,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x20000,2,0); //word,single

    DMA_M2M(0,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x20000,0,1); //byte,burst    

    DMA_M2M(0,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x10000,1,1); //halfword,burst

    DMA_M2M(0,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000, 0x8000,2,1); //word,burst

    //DMA Ch 1

    DMA_M2M(1,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x80000,0,0); //byte,single

    DMA_M2M(1,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x40000,1,0); //halfword,single

    DMA_M2M(1,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x20000,2,0); //word,single

    DMA_M2M(1,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x20000,0,1); //byte,burst

    DMA_M2M(1,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x10000,1,1); //halfword,burst

    DMA_M2M(1,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000, 0x8000,2,1); //word,burst

    //DMA Ch 2

    DMA_M2M(2,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x80000,0,0); //byte,single

    DMA_M2M(2,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x40000,1,0); //halfword,single

    DMA_M2M(2,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x20000,2,0); //word,single

    DMA_M2M(2,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x20000,0,1); //byte,burst

    DMA_M2M(2,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x10000,1,1); //halfword,burst

    DMA_M2M(2,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000, 0x8000,2,1); //word,burst

    //DMA Ch 3

    DMA_M2M(3,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x80000,0,0); //byte,single

    DMA_M2M(3,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x40000,1,0); //halfword,single

    DMA_M2M(3,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x20000,2,0); //word,single

    DMA_M2M(3,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x20000,0,1); //byte,burst

    DMA_M2M(3,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x10000,1,1); //halfword,burst

    DMA_M2M(3,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000, 0x8000,2,1); //word,burst   

}